1. Field of the Invention
The present invention relates to a display device and a method of manufacturing the same and, more particularly, a display device in which a peripheral circuit or a signal processing circuit having the CMOS field effect transistor is built and a method of manufacturing the same.
2. Description of the Prior Art
In the active matrix liquid crystal display device in which the peripheral circuit or the signal processing circuit is built, the thin film transistors (TFTs) are employed as the CMOS transistors of the analog switch and the inverter in not only the display region but also the peripheral circuit or the signal processing circuit.
The low-temperature polysilicon technology is utilized in the thin film transistors in the peripheral circuit or the signal processing circuit like the display region.
The low-temperature crystallizing technology is indispensable to the fabrication of the high performance/low cost peripheral driving circuit TFTs. The typical crystallizing technology practically used at present is the low-temperature crystallizing method using the excimer laser. The silicon crystal thin film with good quality can be formed on the low-melting glass by using the excimer laser.
The basic forming method of crystallization by using the excimer laser will be given as follows, for example.
First, the amorphous silicon (a-Si) starting thin film is formed on the glass substrate by using the thin film forming method such as PECVD (Plasma-Enhanced CVD), etc. Then, in order to improve the laser resistant property of the starting thin film, the hydrogen in the a-Si starting thin film is removed by the thermal process at 400 to 450° C . Then, the polysilicon thin film is formed by irradiating the light beam of the excimer laser to the a-Si starting thin film to crystallize the thin film. Then, the crystallinity of the polysilicon thin film is improved by processing the polysilicon thin film in the atmosphere of the hydrogen, the steam, or the like.
By using such low-temperature polysilicon technology, not only the switching TFT array is formed in the pixel display portion but also the semiconductor integrated circuit is formed in the peripheral circuit portion. Normally the liquid crystal display device in which the peripheral circuit is built is composed of the TFT array of the pixel display portion, the gate driver circuit, and the data driver circuit. Normally, as the data driver circuit, the high performance TFTs having the operation frequency in the range of several megahertz (MHz) to several tens MHz, the field effect mobility of 50 to 300 cm2/Vs, and the appropriate threshold voltage Vth are employed.
However, the request for the mobility of TFT is not so severe in the gate driver circuit and the pixel display portion. For example, the mobility of more than 20 cm2/Vs may be allowed.
In contrast, as the new technical trend of the liquid crystal display device, the ultra high-definition display panel and the high-performance built-in large-scale semiconductor circuit are intended.
First, the ultra high definition display panel will be explained hereunder.
Because of the progress of the multimedia technology and the mobile technology and the spread of the Internet, it is always needed to read/process a great deal of information. Therefore, the request for the ultra high definition display function of the liquid crystal display device as the man-machine interface is enhanced. For example, the large-size ultra high-definition display device or the mobile small-size ultra high-definition liquid crystal display device, that has 200 dpi or more, is requested in the application fields such as the multi-screen display of the home page of the Internet, the multitasking process, the CAD design, etc.
Next, the high-performance large-scale semiconductor circuit in which the liquid crystal panel is built will be explained hereunder.
The technical trend that can implement the intelligent panel or the sheet computer by providing the high-performance large-scale semiconductor integrated circuit in the peripheral circuit portion of the low-temperature polysilicon integral panel is found. For example, it is possible to built the digital driver, the data processing circuit, the memory array, the interface circuit, and CPU in the liquid crystal display panel on the data side.
The normal thin film transistors are employed as the active elements used in such peripheral circuit. The CMOS inverter using the thin film transistor in the prior art has a planar structure shown in FIG. 1A and a sectional structure shown in FIG. 1B. In this case, the insulating film is omitted from illustration in FIG. 1A, and FIG. 1B is a sectional view taken along a I—I line in FIG. LA.
In FIG. 1A and FIG. 1B, a first polysilicon film 102 and a second polysilicon film 103 formed at a distance mutually are formed on an insulating substrate 101. Also, gate electrodes 105, 106 are formed on the first and second polysilicon films 102, 103 via a gate insulating film 104 respectively.
Also, first and second n+-type impurity diffusion regions 102a, 102b are formed on the first polysilicon film 102 on both sides of the gate electrode 105. Also, first and second p+-type impurity diffusion regions 103a, 103b are formed on the second polysilicon film 103 on both sides of the gate electrode 106.
Accordingly, an n-type TFT 110 is constructed by the first polysilicon film 102, the gate insulating film 104, and the gate electrode 105, and a p-type TFT 111 is constructed by the second polysilicon film 103, the gate insulating film 104, and the gate electrode 106. The n-type TFT 110 and the p-type TFT 111 are covered with a first interlayer insulating film 107.
Also, an input wiring 112 connected to two gate electrodes 105, 106 via first and second contact holes 107a, 107b, an output wiring 113 connected to the first n+-type impurity diffusion region 102a and the second p+-type impurity diffusion region 103b via third and fourth contact holes 107c, 107d, a power supply wiring 114 connected to the first p+-type impurity diffusion region 103a via a fifth contact hole 107e, and a ground wiring 115 connected to the second n+-type impurity diffusion region 102b via a sixth contact hole 107f are formed on the first interlayer insulating film 107.
The input wiring 112, the output wiring 113, the power supply wiring 114, and the ground wiring 115 are covered with a second interlayer insulating film 108.
In this case, an input signal Vin is input into the input wiring 112, an output signal Vout is output from the output wiring 113, a power supply voltage VDD is applied to the power supply wiring 114, and the ground wiring 115 is connected to the ground potential GND.
As described above, as the basic design rule of the CMOS circuit in the prior art, TFTs having the different conductivity type are formed on different silicon islands respectively.
By the way, the liquid crystal display panel, in which the peripheral circuit employing the low-temperature polysilicon in the prior art is built, cannot answer the need for the above technical trend because of following subjects.
In the liquid crystal display device, as the high definition display makes progress, the pixel pitch becomes small and also the peripheral circuit density becomes extremely high. It is difficult to form the ultra high-definition display panel, in which the digital driver is built and which has 200 dpi or more, by the manufacturing method in the prior art.
As the first example, in the case of the 8.4-type UXGA panel, the number of pixels is 1600 (horizontal direction)×3×1200 (vertical direction), the display definition is 238 dpi, and the subpixel pitch is 35.5 μm. As the second example, in the case of the 15-type QXGA panel, the number of pixels is 2048 (horizontal direction)×3×1536 (vertical direction), the display definition is 171 dpi, and the subpixel pitch is 49.5 μm.
Therefore, in order to drive the pixel columns of the one vertical line, the peripheral circuit constructed by several hundreds to several thousands TFTs must be arranged in such narrow pixel pitch region.
In order to manufacture the high-performance low-temperature polysilicon intelligent panel, the sheet computer, etc., the large scale circuits such as the digital driver, the data processing circuit, the memory array, the interface circuit, the CPU, etc. must be built in the peripheral region. These large-scale integrated circuits must be arranged in the narrow frame region.
The frame of the liquid crystal panel is in the range of several mm from the edge of the glass substrate because of the requests of lightweight and compactness, and thus the panel having the frame of more than 10 mm is hardly considered. Therefore, in the case of the ultra high-definition panel having the narrow frame, it becomes difficult to built the peripheral circuit in the frame region.
Also, in order to lower the production cost of the liquid crystal panel, the multiple pattern system is employed on the large-size glass substrate having a diagonal dimension of more than 1 m. Since the size of the substrate is large, the shrinkage of the glass substrate itself is large and thus the alignment precision in the pattern formation is not high such as about 1 μm. Also, it is difficult for the existing large-size pattern forming system (the etching equipment, etc.) to form respective metal layer patterns with the working precision of less than 2 μm. Therefore, the large-scale integrated circuit must be formed in the peripheral circuit portion based on the relatively loose design rule.
However, since the positional margin to form respective TFTs 110, 111 must be considered to form a large number of TFTs 110, 111 having the configuration shown in FIGS. 1A and 1B in the narrow frame region, the number of such TFTs is limited. In addition, since the contact holes 107c to 107f are formed individually on the impurity diffusion regions 102a, 102b, 103a, 103b of respective TFTs 110, 111, the positional margin must also be assured around these contact holes 107c to 107f upon forming them, which makes the higher integration of TFTs much more difficult.